The invention relates to a method for producing antifuses and to an antifuse for the selective electrical connection of adjacent conductive regions.
Fuses are generally understood to be conductive connections which are integrated in an integrated circuit and which can be separated by specific measures after the completion of the circuit, in order to perform specific, individual settings for the integrated circuit. In this case, they maintain their setting even in the absence of a supply voltage, i.e. they are quite generally characterized by a permanent physical connection or separation of two contacts. So-called laser fuses are the most common. These are formed by thin interconnects which can be severed with a laser beam depending on the desired setting and, as a result, the conductive connection is opened.
Antifuses are disclosed for example in the reference titled xe2x80x9cApplication-Specific Integrated Circuitsxe2x80x9d, Ch. 4.1, 1997, Addison Wesley Longman, Inc. They are the opposite of a conventional fuse, i.e. they constitute an initially open switch which can be closed by a suitable measure, e.g. by the application of a programming current. Antifuses usually are formed of thin insulating layers between two conductive contacts. They are switched by the insulating layer being made conductive after the application of a programming voltage.
Integrated antifuses generally contain a dielectric layer which is applied on a contact or interconnect layer and on which a further contact region is situated. Such antifuse structures are usually produced by a dielectric layer being deposited over the whole area and then being removed again essentially over the whole area, except in the fuse regions defined lithographically, by dry etching (i.e. reactive ion etching (RIE)), so that islands made of a dielectric material remain on the contact layer. In this method, the contact or interconnect layers of the bottom interconnect plane which are freed of the dielectric layer by the RIE process are attacked and their surface is altered in an undesirable manner.
It is accordingly an object of the invention to provide a method for producing an antifuse and antifuse for the selective electrical connection of adjacent conductive regions that overcome the above-mentioned disadvantages of the prior art methods and devices of this general type, which provides an improved method for producing antifuses.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for producing an antifuse. The method includes the steps of providing a first conductive region, applying a sacrificial layer to the first conductive region, patterning the sacrificial layer resulting in an opening being formed in the sacrificial layer above the first conductive region, applying a fuse layer at least in a region of the opening in the sacrificial layer, removing the fuse layer lying on a surface of the sacrificial layer with an aid of a chemical mechanical polishing method, removing the sacrificial layer, applying a non-conductive layer, forming an further opening in the non-conductive layer above the first conductive region, and introducing a conductive material into the further opening resulting in a formation of a second conductive region.
According to the invention, it is provided that antifuses for the selective electrical connection of adjacent conductive regions are produced by a sacrificial layer being applied to the surface of a first conductive region, which is situated in a non-conductive region of a substrate. The sacrificial layer is patterned e.g. with the aid of a photolithographic method, so that a window is produced above the first conductive region. A fuse layer is applied to the sacrificial layer that has been patterned in this way. The fuse layer is preferably a dielectric layer. During the subsequent removal of the sacrificial layer, the latter is removed together with the fuse layer deposited thereon, so that the fuse layer remains only in the region of the window previously introduced into the sacrificial layer. A non-conductive layer is applied thereon, which layer is provided with contact openings into which conductive material is introduced in order to form a second conductive region.
The production method has the advantage that open conductive regions are not at any time exposed to an etching method or another harmful process by which they can be attacked and damaged. Moreover, the method constitutes a simple production method by which both standard contacts and antifuse contacts can be jointly produced in a process sequence in a simple manner.
In a particular embodiment, it is provided that the fuse layer is formed from a dielectric material and furthermore has a contact layer via which contact is made between the dielectric material of the fuse layer and of the second conductive region. This has the advantage that the contact layer can be used as an etching stop layer during the step of introducing the contact opening into the non-conductive layer. It is thus possible to avoid the situation in which the dielectric layer is etched through in the event of excessively long action of the etching process for the production of the contact holes and an electrical connection is then produced between the first and second conductive regions and, consequently, a fuse contact is not formed.
In a preferred embodiment, it is provided that the removal of the sacrificial layer furthermore contains previously freeing the surface of the sacrificial layer of the fuse layer with the aid of a chemical mechanical polishing method. As a result, the sacrificial layer is more easily accessible to a subsequent selective etching process, in which the etchant is chosen such that it does not attack the fuse layer. If the fuse layer situated on the sacrificial layer were not removed by a CMP method, it would be expedient to carry out a further masking step before an etching process for jointly removing the fuse layer and the sacrificial layer. The masking step is then necessary in order to protect the fuse layer on the first conductive region against the etching process, because the etchant to be used etches the fuse layer and the sacrificial layer.
In accordance with an added feature of the invention, the dielectric material is formed from Si3N4, SiON, and/or SiO2. The sacrificial layer is formed from BPSG, BSG, Poly-Si, a-Si, Al, Ti, or TiN. The first and second conductive regions are formed from tungsten.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method for producing an antifuse and an antifuse for the selective electrical connection of adjacent conductive regions, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.